Netrasemi Domain Specific Architecture for Edge

Graph-stream Parallel Architecture

Netrasemi SoCs are powered with a Graph-stream hardware acceleration architecture. With the help of a heterogeneous computing fabric, the architecture achieves best in class AI and vector processing performance without overloading CPU. It also brings extreme flexibility for software to define graphs involving compute blocks such as Neural processors (NPU), vision processors (VPU), video encoders and Image signal processors (ISP).  It then schedule workloads in a highly flexible manner. This brings extreme power efficiency as well as minimal development complexity. 

Die-to-Die (D2D) Technology for Multi-Die integration

Netrasemi has a UCIe (Universal chiplet Interconnect express) based D2D interconnect technology for multi-die extension of our Domain Specific Architecture (DSA). With the help of our DSA we have the capabilities to support wide range of edge applications extending our Netra-SOC compute capabilities. This include high TOPs (Upto 100 TOPS) neural chips and hybrid application processors for communication, 6G and other technology domains. Netrasemi is looking for partnerships to enable a chiplet based multi-die technology roadmap of our DSA through technology collaboration.


  1. Highly parallel architecture with a Graph-stream execution pipeline for superior performance. With minimal CPU involvement, the architecture achieves best-in-class hardware acceleration.
  2. A software architecture that allows AI/ML development with MINIMAL or NO CODING using heterogeneous hardware Kernels
  3. Highly secure chips with Chain-of-Trust implemented with secure hardware enabling protection at all levels for secure IoT computing.
  4. The DSA architecture scales from 4-100 TOPs with high IO flexibility.
  5.  Smart Edge software studio, Reference hardware Kits and a set of Demo applications enabling agile product development.